Retour à Renesas Electronics

Renesas Electronics 9ZXL1550D Clock Buffers

Renesas Electronics 9ZXL1550D Clock Buffers are 2nd-generation enhanced-performance DB1900Z derivative buffers utilizing Low-Power HCSL (LP-HCSL) outputs. These Renesas Electronics devices are pin-compatible upgrades to the 9ZXL1550B buffer and offer improved phase jitter performance. The 9ZXL1550D buffers use fixed external feedback to maintain low drift for critical QPI/UPI applications. These clock buffers meet the DB2000Q additive phase jitter in fanout mode. Typical applications include servers, storage, networking, and Solid State Displays (SSDs).

Features

  • LP-HCSL outputs with 85Ω Zout
  • Pin compatible with the 9ZXL1550B clock buffer
  • 9 selectable SMBus addresses where multiple devices can share the same SMBus segment
  • Hardware/SMBus control of PLL bandwidth and bypass
  • Selectable Phase-Locked-Loop (PLL) BW minimizes jitter peaking in cascaded PLL topologies
  • Spread spectrum compatible tracks spreading input clock for EMI reduction
  • Software control of each output is SMBus OE bits

Specifications

  • Less than 50ps cycle-to-cycle jitter
  • Less than 50ps output-to-output skew
  • Input-to-output delay is fixed at 0ps
  • Less than 50ps input-to-output delay variation
  • Less than 53fs rms PCle Gen4 additive phase jitter
  • Less than 80fs rms DB2000Q additive phase jitter

Applications

  • Servers
  • Storage
  • Networking
  • Solid State Displays (SSDs)

Block Diagram

Block Diagram - Renesas Electronics 9ZXL1550D Clock Buffers
Publié le: 2018-07-09 | Mis à jour le: 2023-02-01