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Texas Instruments ADS52J65 16-Bit Analog-to-Digital Converter (ADC)

Texas Instruments ADS52J65 16-Bit Analog-to-Digital Converter (ADC) is an 8-channel ADC that uses the CMOS process and innovative circuit techniques. The ADS52J65 is designed to operate at low power and gives a very high signal-to-noise ratio (SNR) performance with a 2Vpp full-scale input. The device offers 80dBFS idle SNR and 78dBFS full-scale SNR at 5MHz. The large input bandwidth of 250MHz makes the device suitable for various applications, such as high-frequency medical ultrasound, magnetic resonance imaging, and multi-channel data acquisition. The ADC integrates an internal reference trimmed to match across devices.

Texas Instruments ADS52J65 has advanced digital features, including a digital I/Q demodulator with a fractional decimation filter. The ADC data from each channel is encoded using an 8B to 10B format and is sent as a SerDes data stream using current-mode logic (CML) output buffers, as per the JESD204B standard. The ADC data from all eight channels can be output over a single CML buffer (1-lane SerDes) with the data rate limited to a maximum of 12.8Gbps. Using SerDes outputs reduces the number of interface lines. This feature and the low-power design enable eight channels to be packaged in a 9mm×9mm VQFN, allowing high system integration densities.

Features

  • 80dBFS 16-bit resolution, idle SNR 
  • 70mW/Ch at 125MSPS, 4-ch per lane
  • 45mW/Ch at 62.5MSPS, 8-ch per lane
  • 2VPP full-scale input 
  • 78dBFS at fin = 10MHz full-scale SNR 
  • –85dBc at fin = 10MHz full-scale SFDR 
  • Analog input –3dB bandwidth = 250MHz
  • Maximum input signal frequency for 2VPP input = 130MHz
  • Fast and consistent overload recovery
  • Advanced digital features
    • Automatic DC offset correction
  • Digital average
  • Digital I/Q demodulator
    • Fractional decimation filter M = 1 to 63 with increments of 0.25
    • Data output rate reduction after decimation
    • 64 mW/ch at 80 MSPS and decimation = 2
    • On-chip RAM with 32 preset profiles
  • JESD204B subclass 0, 1, and 2
    • 2, 4, or 8 channels per JESD lane
    • 10Gbps JESD interface
    • Supports lane rate up to 12.8Gbps for short trace length (< 5 inches)
  • 64-pin non-magnetic 9×9mm package

Applications

  • Medical imaging: Ultrasound, MRI
  • High-frequency ultrasound
  • Non-Destructive Tests (NDT)
  • Radar, lidar, and spectroscopy
  • Digital oscilloscopes and data acquisition

Functional Block Diagram

Block Diagram - Texas Instruments ADS52J65 16-Bit Analog-to-Digital Converter (ADC)
Publié le: 2019-02-05 | Mis à jour le: 2023-06-16